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一种改进的高层功耗估计方法
引用本文:杨军,时龙兴,胡晨,史又华.一种改进的高层功耗估计方法[J].电路与系统学报,2001,6(4):38-41.
作者姓名:杨军  时龙兴  胡晨  史又华
作者单位:东南大学,国家专用集成电路系统工程技术研究中心,江苏,南京,210096
摘    要:本文讨论了集成电路高层功耗估计方法,并针对线性位相关系数模型提出了一种更为精确的功耗估计方法,它可用于功耗驱动的VLSI高层综合。实验结果表明当信号为有限参数的平稳时间序称时,这种估计方法比原有用信号的相关系数来代替强相关位相关系数的方法具有较高的精度,从而提高了在VLSI高层设计时对模块功耗估计的精度。

关 键 词:功耗估计  集成电路  VLSI  电路设计
文章编号:1007-0249(2001)04-038-04
修稿时间:2001年2月13日

An Improved Estimation Method of High-Level Power Dissipation
YANG Jun,SHI Long-xing,HU Chen,SHI You-hua.An Improved Estimation Method of High-Level Power Dissipation[J].Journal of Circuits and Systems,2001,6(4):38-41.
Authors:YANG Jun  SHI Long-xing  HU Chen  SHI You-hua
Abstract:Estimation of IC high level power dissipation problem is discussed. Based on the linear relation model, a more accurate method is proposed to estimate the power dissipation. This method is beneficial to the high level synthesis of power driven VLSI. Experiment results demonstrated that for stable ARMA(N,M) model time-series signals, this method will provide higher precision than the traditional one in which strong bit correlation coefficients are replaced by the weaker signal correlation coefficients. In the process of high level VLSI design, this approach can lead to more accurate estimation of power dissipation of the IC modules under design.
Keywords:Transition Activity  High-Level Synthesis  Estimation of Power Dissipation  
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