A new approach to fabrication of GaAs JFETs |
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Authors: | Y. Ishii S. Nojima M. Ida K. Kurumada |
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Affiliation: | Musashino Electrical Communication Laboratory, Nippon Telegraph and Telephone Public Corporation, 3-9-11 Midoricho, Musashinoshi, Tokyo, Japan 180 |
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Abstract: | A new approach to JFETs is preparing gallium assenide junction field-effect transistor (JFET) presented in this paper, applying Be ion implantation for the first time along with a method of flat and homogeneous ohmic metallization. Several characteristics of FET I–V curve are also discussed.It is revealed that Be ion implantation is sufficiently feasible to obtain a buried p-type gate for the GaAs JFET. Ohmic metallization to GaAs is improved in flatness and homogeneity by simultaneous heating of substrates with Au/Ge deposition. An ion milling process for fine patterning associated with the improved metallization, proves to be useful for device micro-technology. Finally, d.c. characteristics comparable to those of the MESFET are demonstrated by the fabricated JFET, with marked advantages in the process. |
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