基于FPGA的图像中值滤波器的硬件实现

为了实现图像的实时处理,常采用现场可编程门列阵FPGA对采集的数字图像做预处理,在讨论中值滤波算法原理的基础上,利用VHDL硬件描述语言设计一个中值滤波模块对输入图像进行去噪处理,仿真结果说明该算法满足实时性要求,取得较好的仿真效果,并对中值滤波的改进算法进行了讨论。

Hardware Implementation of Median Filter Based on FPGA

To realize the real-time image processing,people often uses FPGA to do image preprocessing with collected digital image.On basis of discussing the principle of median filter algorithm,this paper uses VHDL language and designs a module of median filter to remove the impulse in input image and gains a real-time request and good result.At the end of the paper,it discusses the improved realization of the algorithm.