An 8-bit parasitic-insensitive switched-capacitor A/D converter

An algorithmic A/D converter (ADC) is presented which employs switched capacitors. The ADC is insensitive to parasitic capacitances and op-amp offset voltages. Capacitor ratio-mismatch errors and charge injection errors are investigated. System level computer simulations are included to support the theory. The technique is suitable for 8-bit A/D conversion using present CMOS technology.