| 基于CPCI与LPC总线的主板BIT设计 |
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| 引用本文： | 王凡,胡晓吉,王有为,张雷.基于CPCI与LPC总线的主板BIT设计[J].计算机工程与设计,2011,32(8):2905-2908. |
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| 作者姓名： | 王凡 胡晓吉 王有为 张雷 |
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| 作者单位： | 中国电子科技集团公司第十五研究所,北京,100083 |
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| 摘 要： | 为提高CPCI计算机设备的可靠性,准确地定位故障,减少设备的维修时间,在原计算机主板的基础上,提出了基于CPCI总线及LPC总线的故障检测卡。以故障检测和定位为目标,兼顾设备的扩展性和易用性,建立以CPLD为控制芯片,采用VHDL硬件描述语言,实现对计算机主板进行故障检测和定位的功能卡。详细介绍了BIT(built in test)卡的原理和软、硬件设计,并给出了仿真结果。仿真实验结果表明,整个设计安全可靠,移植性好,可为计算机的主板设计提供参考。
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| 关 键 词： | 主板 机内测试 紧凑式外部设备互连总线 低引脚计数总线 复杂可编程逻辑器件 超高速集成电路硬件描述语言 |
BIT design of motherboard based on CPCI and LPC bus |
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| WANG Fan,HU Xiao-ji,WANG You-wei,ZHANG Lei.BIT design of motherboard based on CPCI and LPC bus[J].Computer Engineering and Design,2011,32(8):2905-2908. |
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| Authors: | WANG Fan HU Xiao-ji WANG You-wei ZHANG Lei |
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| Affiliation: | WANG Fan,HU Xiao-ji,WANG You-wei,ZHANG Lei(15th Research Institute of China Electronics Technology Group Corporation,Beijing 100083,China) |
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| Abstract: | To improve the reliability of CPCI computer devices,the errors are reported exactly and the repairing hour is reduced.The failure detecting card based on CPCI and LPC bus is proposed.To detect and locate the errors,considering the expansibility and con-venience,a card based on CPLD and VHDL is designed,which can detect and locate the failure of mainboard.The hardware and software design of the BIT card and the working principle are described in detail,also the result of simulation is given.The BIT card runs... |
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| Keywords: | mainboard BIT CPCI LPC CPLD VHDL |
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