基于FPGA的全数字锁相环电机调速系统设计 |
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引用本文: | 陈欢. 基于FPGA的全数字锁相环电机调速系统设计[J]. 电子测试, 2016, 0(18). DOI: 10.3969/j.issn.1000-8519.2016.18.008 |
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作者姓名: | 陈欢 |
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作者单位: | 无锡科技职业学院,214112 |
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摘 要: | 数字锁相环具有抗干扰能力强、锁相效果好等优点。而电机锁相控制系统调速精度高,易于用程序实现。本文介绍了一种基于FPGA的数字锁相环,用于电机调速系统的设计。
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关 键 词: | 锁相环 FPGA 鉴相器 滤波器 |
Digital Phase-locked Loop Motor Speed Control based on FPGA |
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Abstract: | Digital phase-locked loop has the advantage of anti-interference and well phase-locked. Meanwhile,there is high accuracy in motor phase-locked control system which can be achieved by program. This paper presents an digital phase-locked based on FPGA so as to control the speed of the motor. |
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Keywords: | Phase-locked Loop FPGA Phase Detector Filter |
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