Novel Radix Finite Field Multiplier for GF(2m) |
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Authors: | MC Mekhallalati AS Ashur and MK Ibrahim |
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Affiliation: | (1) Department of Electrical and Electronic Engineering, University of Nottingham, University Park, Nottingham, NG7 2RD, U.K;(2) Department of Electronic and Electrical Engineering, De Montfort University, Leicester, LE1 9BH, U.K |
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Abstract: | In this paper, a new High-Radix Finite Field multiplication algorithm for GF(2m) is proposed for the first time. The proposed multiplication algorithm can operate in a Digit-serial fashion, and hence can give a trade-off between the speed, the area , the input/output pin limitation, and the low power consumption by simply varying the digit size. A detailed example of a new Radix-16 GF(2m) Digit-Serial multiplication architecture adopting the proposed algorithm illustrates a speed improvement of 75% when compared to conventional Radix-2 bit-serial realization. This is made more significant when it is noted that the speed improvement of 75% was achieved at the expense of only 2.3 times increase in the hardware requirements of the proposed architecture. |
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