A novel random PWM technique with low computational overhead and constant sampling frequency for high-volume, low-cost applications

A novel random pulse-width modulation (PWM) technique for three-phase voltage-source inverters, characterized by low computational overhead, a variable switching frequency, and a constant sampling frequency, is presented. The technique is based on two strategies: 1) the so-called arithmetic PWM (APWM), which yields the same switching patterns as the classic space-vector modulation, but with minimal computational effort and 2) randomization of switching periods by varying the delay of switching cycles with respect to corresponding sampling cycles. Simplicity of the technique, named a variable-delay random PWM (VDRPWM) method, allows its implementation in cheap, low-end processors. It makes the VDRPWM the best choice for high-volume, low-cost applications, such as domestic and automotive ac drives and UPSs. The random aspect of the technique has a mitigating effect on the acoustic and electromagnetic noise emitted by the supplied system. This feature has been confirmed by experiments with a 40-hp induction motor drive.