Novel low-power and stable SRAM cells for sub-threshold operation at 45 nm |
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Authors: | Anu Gupta Priya Gupta Abhijit Asati |
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Affiliation: | EEE Department, BITS PILANI, Rajasthan, India |
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Abstract: | In scaled technologies with lower supply voltage, conventional Static Random Access Memory (SRAM) cell suffers from unsuccessful read & write operation due to high off state current in sub-threshold region at nanometre technologies. This work proposes new functional low-power designs of SRAM cells with 7, 8, 9 and 12 transistors which operate at only 0.4V power supply in sub-threshold operation at 45 nm technology. Stability analysis is carried out using static noise margins as well as N-curve cell stability metrics. For performance measurement, read/write access time and leakage power consumption in hold mode are analysed. The comparison with published designs shows that two new proposed designs namely M8T, MPT8T have 30% less leakage power consumption along with 2× read stability, 2× write ability, more than 60% faster read & write operation. |
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Keywords: | SRAM low power sub-threshold static noise margin variability |
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