High frequency analytical modelling and performance comparison of nanoscale SOI MOS structures

A generalized high frequency analytical model of nanoscale Semiconductor-On-Insulator (SOI) MOS structure, valid for different competitive nanoscale SOI MOS structures is developed. Interface roughness and trap-charge effects are incorporated in addition to different common short channel effects to make the model valid for SOI structures with non-native gate dielectrics. Analytical models for threshold voltage, current-voltage, conductance, cut-off frequency and noise factor have been derived starting from basic 2D Poisson’s equation with some innovative modifications. Performances of three competitive MOSFET structures – Silicon-On-Insulator (SiOI), Germanium-On-Insulator (GeOI) and Gallium arsenide-On-Insulator (GaOI) have been simulated and compared. It has been found that the overall performance of the structure is determined by combined effects of different material, structural and operation parameters, which may or may not improve the performance of the structure when considered individually. As an example, when higher channel mobility of GaAsOI tries to improve its performance, lower intrinsic carrier concentration, higher interface roughness, trap-charge etc. try to limit its performance. This work demonstrated that a trade-off or parameter optimization is vital for effective selection of one structure over others.