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Low‐Power Nonvolatile Charge Storage Memory Based on MoS2 and an Ultrathin Polymer Tunneling Dielectric
Authors:Myung Hun Woo  Byung Chul Jang  Junhwan Choi  Khang June Lee  Gwang Hyuk Shin  Hyejeong Seong  Sung Gap Im  Sung‐Yool Choi
Affiliation:1. School of Electrical Engineering, Graphene/2D Materials Research Center, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Republic of Korea;2. Department of Chemical and Biomolecular Engineering, Graphene/2D Materials Research Center, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Republic of Korea
Abstract:Low‐power, nonvolatile memory is an essential electronic component to store and process the unprecedented data flood arising from the oncoming Internet of Things era. Molybdenum disulfide (MoS2) is a 2D material that is increasingly regarded as a promising semiconductor material in electronic device applications because of its unique physical characteristics. However, dielectric formation of an ultrathin low‐k tunneling on the dangling bond‐free surface of MoS2 is a challenging task. Here, MoS2‐based low‐power nonvolatile charge storage memory devices are reported with a poly(1,3,5‐trimethyl‐1,3,5‐trivinyl cyclotrisiloxane) (pV3D3) tunneling dielectric layer formed via a solvent‐free initiated chemical vapor deposition (iCVD) process. The surface‐growing polymerization and low‐temperature nature of the iCVD process enable the conformal growing of low‐k (≈2.2) pV3D3 insulating films on MoS2. The fabricated memory devices exhibit a tunable memory window with high on/off ratio (≈106), excellent retention times of 105 s with an extrapolated time of possibly years, and an excellent cycling endurance of more than 103 cycles, which are much higher than those reported previously for MoS2‐based memory devices. By leveraging the inherent flexibility of both MoS2 and polymer dielectric films, this research presents an important milestone in the development of low‐power flexible nonvolatile memory devices.
Keywords:charge storage memory  gate coupling ratio  low‐k dielectrics  low‐power memory  MoS2
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