| 基于高速数模转换器的通用雷达信号模拟器的设计 |
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| 引用本文： | 王倩,李燕,王虹现,邢孟道.基于高速数模转换器的通用雷达信号模拟器的设计[J].电子科技,2008,21(1):21-24. |
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| 作者姓名： | 王倩 李燕 王虹现 邢孟道 |
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| 作者单位： | 西安电子科技大学,雷达信号处理国家重点实验室,陕西,西安,710071 |
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| 摘 要： | 针对雷达设计调试困难的问题,提出一种通用雷达信号模拟器的设计方案,以一个FPGA和两个高速DA芯片为核心,另外配置大容量存储器.目标及环境数据采用DDS方法产生或通过外部接口加载,再经过DAC输出雷达回波信号,供雷达信号处理机调试使用,文中给出了模拟器应用实例.
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| 关 键 词： | 雷达信号模拟器 |
| 文章编号： | 1007-7820（2008）01-021-04 |
| 收稿时间： | 2007-07-09 |
| 修稿时间： | 2007年7月9日 |
Design of General Radar Signal Simulator Based on High-speed DAC |
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| Wang Qian,Li Yan,Wang Hongxian,Xing Mengdao.Design of General Radar Signal Simulator Based on High-speed DAC[J].Electronic Science and Technology,2008,21(1):21-24. |
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| Authors: | Wang Qian Li Yan Wang Hongxian Xing Mengdao |
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| Abstract: | To solve the problem of radar design and debug, a design the radar signal simulator based on two high speed D/A and a FPGA is advanced. Object and circumstance data are generated by DDS methods or transferred through external interface, then the data are converted by DAC into radar echo signal for radar signal processor. An example is given of the application of the simulator in the development process of a radar signal processor. |
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| Keywords: | FPGA DAC CPCI |
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