A novel optimization design for 3.3 kV injection-enhanced gate transistor |
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Authors: | Tian Xiaoli Chu Weili Lu Jiang Lu Shuojin Yu Qiaoqun and Zhu Yangjun |
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Affiliation: | Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;Jiangsu R&D Center for Internet of Things, Wuxi 214135, China;Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China;Jiangsu R&D Center for Internet of Things, Wuxi 214135, China |
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Abstract: | This paper introduces a homemade injection-enhanced gate transistor (IEGT) with blocking voltage up to 3.7 kV. An advanced cell structure with dummy trench and a large cell pitch is adopted in the IEGT. The carrier concentration at the N-emitter side is increased by the larger cell pitch of the IEGT and it enhances the P-i-N effect within the device. The result shows that the IEGT has a remarkablely low on-state forward voltage drop (VCE(sat)) compared to traditional trench IGBT structures. However, too large cell pitch decreases the channel density of the trench IEGT and increases the voltage drop across the channel, finally it will increase the VCE(sat) of the IEGT. Therefore, the cell pitch selection is the key parameter consideration in the design of the IEGT. In this paper, a cell pitch selection method and the optimal value of 3.3 kV IEGT are presented by simulations and experimental results. |
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Keywords: | IEGT dummy cell 3 3kV cell pitch |
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