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| 一种高速低功耗直接数字频率合成器的设计与实现 | |
| 引用本文： | 郭军朝,王森章. 一种高速低功耗直接数字频率合成器的设计与实现[J]. 微电子学, 2004, 34(5): 572-574 |
| 作者姓名： | 郭军朝 王森章 |
| 作者单位： | 上海交通大学,微电子所,上海,200030 |
| 摘 要： | 根据直接数字频率综合(DDS)的原理，采用各种优化技术，设计了一种高速低功耗直接数字频率合成器。详细介绍了电路结构及优化方法。电路采用Xilinx公司的Virtex器件实现，取得了较好的整体性能。 |
| 关 键 词： | 现场可编程门阵列 频率合成器 直接数字频率合成 流水线结构 |
| 文章编号： | 1004-3365(2004)05-0572-03 |
Design and Implementation of a High-Speed/Low-Power Direct Digital Synthesizer |
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| GUO Jun-chao,WANG Sen-zhang. Design and Implementation of a High-Speed/Low-Power Direct Digital Synthesizer[J]. Microelectronics, 2004, 34(5): 572-574 | |
| Authors: | GUO Jun-chao WANG Sen-zhang |
| Abstract: | Based on the theory of direct digital synthesis(DDS), a high-speed/low-power direct digital frequency synthesizer is designed using a number of optimization techniques. The circuit architecture and its optimization are described in detail. Implemented in Virtex FPGA, the device has an excellent overall performance. |
| Keywords: | FPGA Frequency synthesizer Digital direct synthesis Pipelined architecture |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ | |