Fast algorithms for selection of test nodes of an analog circuit using a generalized fault dictionary approach

Selection of test nodes is an important phase of the fault dictionary approach. It is demonstrated in this paper that the techniques used for this purpose in other approaches of analog fault diagnosis like fault analysis and fault verification are not in general suitable for the fault dictionary approach. The ambiguity set is a simple and effective concept for choosing test nodes in the context of dictionaries. These sets are formed such that each faulty condition lies in only one ambiguity set. Deviating from this thinking, overlapping ambiguity sets are proposed in this paper, giving rise to a generalized fault dictionary. These sets use information more fully and hence reduce the number of test nodes. The concept of hashing is applied in this paper for selecting test nodes. This gives a linear time algorithm (linear in the number of fault voltage specificationsf) and it isf times faster than the existing methods. It is not possible to select test nodes faster than this. This technique can also be used to select test nodes by the process of elimination of nodes. This is also linear inf per node elimination. Even a group of nodes can be eliminated or selected within the same computation. This freedom is not possible with the existing methods.