Electrical characterization of deep level systems in semiconductor junctions by admittance measurements

Deep level impurities in a semiconductor junction can be characterized by the frequency, temperature and bias dependence of the junction admittance. It will be shown briefly, that the build-up of the junction admittance from the bulk semiconductor to the junction interface can be given in terms of a first order differential equation. For a general case, the admittance of a junction device can then be obtained via a numerical integration of the differential equation. However, under certain simplifying assumptions one can obtain a simple analytic solution which can be modeled by an equivalent circuit consisting of lumped constant elements. The experimentally determined admittance of a Hf-In doped p-type Si as a function of temperature, frequency and bias, is correlated to the admittance determined from a numerical integration of the differential equation wherein four temperature independent parameters, via. the concentration, the ground state energy level and it’s associated degeneracy of the In in Si and the Schottky barrier height of Hf on p-type Si, determined by independent measurements, are used, and one temperature invariant parameter, the shallow level impurity concentration, N_s, and a temperature dependent parameter, the hole capture cross-section of In in Si, σ_p, are adjusted for the best fit. The value of N_s is found to agree within 19% of the volume average determined from Hall measurement and the magnitude and temperature dependence of σ_p is found to agree well with several previously reported values.