| FPGA的并行多通道激励信号产生模块 |
| |
| 引用本文： | 郭晓冉,崔少辉,杨川,方丹.FPGA的并行多通道激励信号产生模块[J].单片机与嵌入式系统应用,2010(5):11-13,48. |
| |
| 作者姓名： | 郭晓冉 崔少辉 杨川 方丹 |
| |
| 作者单位： | 1. 军械工程学院,石家庄,050003
2. 驻209所军事代表室 |
| |
| 摘 要： | 通过对并行测试中激励资源的需求分析,提出了一种基于FPGA技术的能够提供多通道并行激励的信号产生模块。它从硬件方面为并行测试提供多通道的激励信号,从而降低软件方面任务分解和调度的难度。
|
| 关 键 词： | 并行测试 FPGA 多通道激励信号产生模块 |
Parallel Multi-channel Incentive Signal Generation Module Based On FPGA |
| |
| GuoXiaoran,Cui Shaohui,Yang Chuan,Fang Dan.Parallel Multi-channel Incentive Signal Generation Module Based On FPGA[J].Microcontrollers & Embedded Systems,2010(5):11-13,48. |
| |
| Authors: | GuoXiaoran Cui Shaohui Yang Chuan Fang Dan |
| |
| Affiliation: | 1.Ordnance Engineering College;Shijiazhuang 050003;China;2.Miliitary Representative Office in 209 Institute |
| |
| Abstract: | The incentive resource requirement of parallel test is analyzed,and the module of multi-channel parallel incentive signal generation based on FPGA is advanced.The module provides abundant incentive signal channels for parallel test from hardware aspect,reducing the difficulty of decomposing and scheduling test tasks in the part of software. |
| |
| Keywords: | parallel test FPGA multi-channel incentive signal generation module |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
