| 块基型FPGA中IO模块阵列的设计 |
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| 引用本文： | 丁光新,陈陵都,刘忠立.块基型FPGA中IO模块阵列的设计[J].半导体学报,2009,30(8):085008-6. |
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| 作者姓名： | 丁光新 陈陵都 刘忠立 |
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| 作者单位： | Institute;Semiconductors;Chinese;Academy;Sciences; |
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| 摘 要： |
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| 关 键 词： | FPGA 设计策略 阵列 基础 可编程寄存器 路由配置 瓷砖 结构描述文件 |
| 收稿时间： | 3/9/2009 11:43:01 AM |
| 修稿时间： | 4/6/2009 10:57:47 PM |
Design for an IO block array in a tile-based FPGA |
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| Ding Guangxin,Chen Lingdou and Liu Zhongli.Design for an IO block array in a tile-based FPGA[J].Chinese Journal of Semiconductors,2009,30(8):085008-6. |
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| Authors: | Ding Guangxin Chen Lingdou and Liu Zhongli |
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| Affiliation: | Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China |
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| Abstract: | A design for an IO block array in a tile-based FPGA is presented. Corresponding with the characteristics of the FPGA, each IO cell is composed of a signal path, local routing pool and configurable input/output buffers. Shared programmable registers in the |
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| Keywords: | FPGA IO block signal path configurable IO buffer layout packaging |
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