Behavior of hot carrier generation in power SOI LDNMOS with shallow trench isolation (STI)

In this work, we investigated the hot carrier (HC) generation of power silicon-on-insulator (SOI) lateral double-diffused N-type MOSFETs (LDNMOSFET) with shallow trench isolation (STI) structure under different biasing conditions. Experimental measurements of drain and substrate currents are done. Two-dimensional (2-D) device simulation is performed to provide a better insight on the electrical behaviors of the device by looking at the electric-field (EF), electron current density (J_E) and impact ionization generation rate (R_II) distributions in the devices. The high R_II site is found to be near the STI corner instead of near the channel or field oxide area close to the gate surface in standard small signal MOSFET.