1.5 V CMOS full-swing energy efficient logic (EEL) circuit suitablefor low-voltage and low-power VLSI applications |
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Authors: | Yeh C.C. Lou J.H. Kuo J.B. |
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Affiliation: | Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei ; |
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Abstract: | ![]() A 1.5 V full-swing energy efficient logic circuit is reported that is suitable for next-generation low-power VLSI applications using a low supply voltage. At 25 MHz and at 1.5 V, the power consumption of the EEL circuit is 70% of that for an ECRL circuit and 47% of that for the static circuit |
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