基于Booth\CSD混合编码的模 乘法器的设计 |
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引用本文: | 王敏,徐祖强,邱陈辉.基于Booth\CSD混合编码的模 乘法器的设计[J].电子器件,2014,37(2). |
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作者姓名: | 王敏 徐祖强 邱陈辉 |
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作者单位: | 江苏省镇江市京口区梦溪路2号 江苏科技大学电子信息学院 |
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摘 要: | 在余数系统的设计中,模加法器和模乘法器的设计处于核心地位,尤其是模乘法器的性能,是衡量余数系统系能的主要标志之一。文中先推导出Booth编码下的模 乘法器设计的算法,然后针对Booth编码模乘法器设计中译码电路复杂的问题,提出了一种基于Booth/ CSD混合编码的模乘法器设计方法,基于Booth/CSD编码的模乘法器部分积的位宽相对传统的Booth编码乘法器而言,减少了50%;经试验证明,与传统的基-Booth编码的模乘法器相比这种混合编码的模乘法器的速度提高了5%,面积减少24.7%。
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关 键 词: | 电子电路设计 模 乘法器 Booth/CSD编码 余数系统 |
The Design Of Modulo Multiplier Based On Booth/CSD Hybrid Encoding |
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Abstract: | In the design of RNS system,the modulo multiplier and adder design are in a core position ,espically the performance of the modulo mulitipliers ,which is the main mark of a successfully RNS system.In this paper,we deduce the arithmetic used in the design of the Booth-based modulo multiplier first,and then in order to solve the problem of complex decoding circuit in design ,we put forward a new method ,in this method we bring the efficient csd enconding technology and radix-booth encoding techniques together, the partial product of Booth/CSD encoding module multiplier has a decrease of fifty percent compared with traditional Booth based module multiplier;the test result demonstrate that ,in comparision with the traditional Booth based module multiplier the speed which we take Booth/CSD encoding method has an increase of five percent and the area has a decrease of twenty four point seven. |
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Keywords: | electronic circuit design module multiplier Booth/CSD encoding RNS system |
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