Reliability evaluations for board-level chip-scale packages under coupled power and thermal cycling test conditions

To evaluate conjointly the effects of ambient temperature fluctuation and operation bias on the reliability of board-level electronic packages, a coupled power and thermal cycling test has been proposed. In this study, the sequential thermal–mechanical coupling analysis, which solves in turn the transient temperature field and subsequent thermomechanical deformations, is performed to investigate thermal characteristics along with fatigue reliability of board-level thin-profile fine-pitch ball grid array chip-scale packages under coupled power and thermal cycling test conditions. Effects of different power cycling durations are studied. A pure thermal cycling condition is also examined and compared. Numerical results indicate that, for the coupled power and thermal cycling test, a shorter power cycling duration in general leads to a shorter fatigue life. However, the temperature compensation effect elongates the fatigue life under certain power cycling durations.