Improved de-embedding technique for polysilicon resistor modelling

In this article, accurate de-embedding technique based on transmission line theory is presented and applied to on-wafer polysilicon resistors fabricated in 130-nm SiGe technologies. Compared with the conventional de-embedding methods, not only the top metal layer, but also the under-layer metal parasitics are removed from the on-wafer passives. A systematic method relying exclusively on embedded S-parameters is used for the direct extraction of device circuit elements. This extracted method is characterised by its simplicity and ease of implementation. The proposed de-embedding technique and extraction approach are validated by polysilicon resistors with occupying areas of 20?×?2?µm². Good agreement between the measured and modelled data is obtained from 100?MHz up to 20.1?GHz.