| 84dB动态范围13b/400kHz/3V/5.88mW∑△模数转换器 |
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| 引用本文： | 李卓,杨华中.84dB动态范围13b/400kHz/3V/5.88mW∑△模数转换器[J].半导体学报,2008,29(11). |
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| 作者姓名： | 李卓 杨华中 |
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| 作者单位： | 清华大学电子工程系,北京,100084 |
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| 摘 要： | 介绍了一个200kHz信号带宽、用于低中频结构GSM射频接收机的高精度∑△调制器.为了达到高线性和稳定性,调制器采用2-1级联单比特的结构实现.电路在0.18μm CMOS工艺下流片验证,核心面积为0.5mm×1.1mm.调制器工作在19.2MHz的采样频率,在3V电源电压下功耗为5.88mW.测试结果表明,在200kHz信号带宽,过采样率为64的条件下,调制器达到84.4dB动态范围,峰值SNDR达到73.8dB,峰值SNR达到80dB.
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| 关 键 词： | 级联∑△调制器 模数转换器 开关电容 运算放大器 CMOS模拟积分电路 |
A 3V 5.88mW 13b 400kHz Sigma-Delta Modulator with 84dB Dynamic Range |
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| Li Zhuo,Yang Huazhong.A 3V 5.88mW 13b 400kHz Sigma-Delta Modulator with 84dB Dynamic Range[J].Chinese Journal of Semiconductors,2008,29(11). |
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| Authors: | Li Zhuo Yang Huazhong |
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| Abstract: | This paper introduces a high-revolution,200kHz signal bandwidth ∑△ modulator for low-IF GSM receivers that adopts a 2-1 cascaded single-bit structure to achieve high linearity and stability. Our design is realized in a standard 0. 18μm CMOS process with an active area of 0. 5mm x 1. 1mm. The ∑△ modulator is driven by a single 19. 2MHz clock signal and dissipates 5.88roW from 3V power supply. The experimental results show that, with an oversampling ratio of 48, the modulator achieves a 84. 4dB dynamic range,73.8dB peak SNDR,and 80dB peak SNR in the signal bandwidth of 200kHz. |
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| Keywords: | cascaded sigma-delta modulator analog-digital converter switched-capacitor circuits operational amplitiers CMOS analog integrated circuits |
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