An investigation on capacitance-trigger ESD protection devices for high voltage integrated circuits |
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| Affiliation: | 1. Key Laboratory of Advanced Process Control for Light Industry (Ministry of Education), Department of Electronic Engineering, Jiangnan University, Wuxi 214122, China;2. ESD Laboratory, Department of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China;1. Canaan Semiconductor Ltd., Hong Kong;2. Department of Applied Physics, Hong Kong Polytechnic University, Hung Hum, Hong Kong;3. Department of Electronic Engineering, City University of Hong Kong, Kowloon Tong, Hong Kong;4. Department of Electrical and Electronic Engineering, University of Hong Kong, Pokfulam, Hong Kong;1. Graduate Institute of Precision Engineering, National Chung Hsing University, Taichung 402, Taiwan, ROC;2. Department of Chemical Engineering, National Chung Hsing University, Taichung 402, Taiwan, ROC |
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| Abstract: | ![]()
A novel cascaded complementary dual-directional silicon controlled rectifier (CCDSCR) structure has been proposed and implemented in a 0.5 μm 20 V Bipolar/CMOS/DMOS process as an ESD (electrostatic discharge) protection device. The ESD characteristics of the capacitance-trigger CCDSCR has been investigated by transmission line pulse (TLP) testing. Compared with the substrate-trigger insulated gate bipolar transistor with the enhanced substrate parasitic capacitance, the gate-driven trigger insulated gate bipolar transistor with the gate coupling capacitance and the normal dual-directional silicon controlled rectifier, the CCDSCR has the highest holding voltage of about 25.4 V and the best current conduction uniformity. In addition, it has the best figure of merit (FOM) with the value of about 0.64 mA/μm2. The good current conduction uniformity in CCDSCR due to the enhanced substrate parasitic capacitance-trigger effect is finally confirmed by Sentaurus simulations. |
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