| 基于FPGA的数字信号传输性能分析仪 |
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| 引用本文： | 孙盼,姚佳毅,林阅斌. 基于FPGA的数字信号传输性能分析仪[J]. 电子科技, 2012, 25(8): 32-34. DOI: 10.3969/j.issn.1007-7820.2012.08.011 |
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| 作者姓名： | 孙盼 姚佳毅 林阅斌 |
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| 作者单位： | 1.山东大学信息科学与工程学院,山东济南,250000;2.山东大学信息科学与工程学院,山东济南,250000;3.山东大学信息科学与工程学院,山东济南,250000 |
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| 摘 要： | 文中分析的FPGA系统以数字电路为核心,由数字信号发生器、低通滤波器、加法器、伪随机信号发生器、数字信号分析电路组成。并通过对系统方案的对比,以及电路、软件的分析与设计,针对数据率误差、伪随机码误差、眼图和眼幅度均进行了实测,检测结果显示误差值均在允许范围内。
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| 关 键 词： | 曼彻斯特码 数字锁相环 同步信号 眼图 |
Analyzer of Transmission Performance for Digital Signals Based on FPGA |
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| SUN Pan,YAO Jiayi,LIN Yuebin. Analyzer of Transmission Performance for Digital Signals Based on FPGA[J]. Electronic Science and Technology, 2012, 25(8): 32-34. DOI: 10.3969/j.issn.1007-7820.2012.08.011 |
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| Authors: | SUN Pan YAO Jiayi LIN Yuebin |
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| Affiliation: | (School of Information Science and Engineering,Shandong University,Jinan 250000,China) |
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| Abstract: | The FPGA system analyzed in this paper has the digital circuit as its core.It is composed of the digital signal generator,low pass filter,adder,pseudo random signal generator and digital signal analysis circuit.The system scheme is compared and the circuit and software are analyzed and designed.To reduce the data rate error and pseudo random code error,eye and eye amplitude were measured.Test results show that error values are within the allowable range. |
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| Keywords: | manchester code digital phase-locked loop synchronized clock signal eye diagram |
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