A microprogrammable real-time video signal processor (VSP) formotion compensation |
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Authors: | Yamashina M. Enomoto T. Kunio T. Tamitani I. Harasaki H. Endo Y. Nishitani T. Satoh M. Kikuchi K. |
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Affiliation: | NEC Corp., Kanagawa; |
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Abstract: | A video signal processor (VSP) LSI circuit with a three pipelined architecture has been developed for pattern matching, which is fundamental for the motion compensation necessary for teleconferencing systems. A high-speed arithmetic logic unit with absolute-value calculation capability and a minimum/maximum value detector, which are essential to pattern matching, have been integrated on the VSP LSI. The chip was fabricated with a 2.5-μm CMOS and double-layer metallization technology. The number of MOSFETs integrated on the 9.91×9.50-mm 2 chip is about 48000. It operates at a 14.3-MHz clock frequency with a single 5-V power supply and typically consumes 240 mW. An experimental video signal processing system, using a single VSP LSI chip, is discussed |
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