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A systematic approach to profiling for hardware/software partitioning |
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| Authors: | M Finc [Author Vitae] [Author Vitae] |
| Affiliation: | Faculty of Electrical Engineering, Laboratory for Integrated Circuits Design, University of Ljubljana, Trzaska c.25, 1000 Ljubljana, Slovenia |
| Abstract: | |
| Keywords: | Hardware/software (HW/SW) co-design HW/SW partitioning Field Programmable gate array (FPGA) Embedded soft-core processor Performance analysis Profiling System-on-programmable-chip (SoPC) |
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