| 伪码测距中码跟踪环的FPGA实现 |
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| 引用本文： | 潘树国, 安康, 王庆,.伪码测距中码跟踪环的FPGA实现[J].电子器件,2008,31(6). |
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| 作者姓名： | 潘树国 安康 王庆 |
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| 作者单位： | 东南大学仪器科学与工程学院,210096 |
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| 基金项目： | 国家科技支撑计划重点项目课题
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国家公益性行业基金
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| 摘 要： | 码跟踪环的设计是伪码/载波相位联合测距系统的一个关键环节.分析了伪码跟踪环路的结构,利用查表法、二阶环路分别对NCO和环路滤波器等关键部分进行了设计,并给出了相应的电路结构.系统仿真与FPAG片上测试结果表明,实现了伪码准确、实时跟踪,跟踪到的伪码相位误差小于载波相位的周期长,设计的跟踪环具有一定工程应用价值.
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| 关 键 词： | 伪码测距 码跟踪环 |
FPGA Realization of Code Tacking Loop in PN Code Ranging |
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| PAN Shu-guo,AN Kang,WANG Qing.FPGA Realization of Code Tacking Loop in PN Code Ranging[J].Journal of Electron Devices,2008,31(6). |
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| Authors: | PAN Shu-guo AN Kang WANG Qing |
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| Affiliation: | PAN Shu-guo,AN Kang,WANG Qing(School of Instrument Science , Engineering,Southeast university,Nanjing 210096,China) |
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| Abstract: | The design of code tracking loop is one of the key part of the PN code /carrier ranging system.The structure of code tracking loop is analyzed.The key parts of the code tracking loop,NCO and loop filter,are designed by look-up table and quadratic loop,their corresponding circuits are presented.The simulation and test results on FPGA show that real time and exact PN code tracking is realized,and PN code length is less than carrier period length.It has some reference value for the engineering practice of code... |
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| Keywords: | FPGA |
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