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Automatic Intra-Register Vectorization for the Intel® Architecture
Authors:Bik  Aart J C  Girkar  Milind  Grey  Paul M  Tian  Xinmin
Affiliation:(1) Intel Corporation, 2200 Mission College Blvd. SC12-301, Santa Clara, California, 95052
Abstract:Recent extensions to the Intel® Architecture feature the SIMD technique to enhance the performance of computational intensive applications that perform the same operation on different elements in a data set. To date, much of the code that exploits these extensions has been hand-coded. The task of the programmer is substantially simplified, however, if a compiler does this exploitation automatically. The high-performance Intel® C++/Fortran compiler supports automatic translation of serial loops into code that uses the SIMD extensions to the Intel® Architecture. This paper provides a detailed overview of the automatic vectorization methods used by this compiler together with an experimental validation of their effectiveness.
Keywords:compilers  instruction-level-parallelism  SIMD  vectorization
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