一种用于靶场多台站的时间同步电路设计

在靶场组网测试中,测试终端和多个测试分站间的时间同步直接影响测试参数准确性,为提高时间同步精度,基于SOPC技术和GPS授时相结合设计了测试分站时间同步电路。通过GPS接收机输出1PPS脉冲信号作为测试站的时间基准信号,在FPGA中设计Nios II处理器及相应的逻辑模块,由Nios II处理器通过中断信号提取当前时刻的UTC时间信息,逻辑模块实现本地时钟与GPS-1PPS脉冲信号的时间差,最终得出精确的微秒级UTC时间。该电路具有精度高、功耗低、集成度高等特点,对实现测试系统集成优化设计,提高系统的可靠性、灵活性、稳定性具有重要意义。

Design for Multi-target Station Time Synchronization Circuit

In target measurement networking, time synchronization is the first condition to achieve test pa- rameters accurate among test terminals and several test sub-stations. We have designed sub-station time synchronization system based on SOPC technology and GPS time to improve the accuracy of time synchroni- zation. Test sub-station receive GPS_I PPS pulse signal from GPS receiver as the base time signal, and we have designed Nios II processor and related logic module in FPGA. The Nios II processor pick up the cur- rent UTC time information through interrupt signal, the logic module get the time difference between local PPS signal and GPS_I PPS signal, and finally obtain the accurate microsecond UTC time. The circuit, with high precision, low power consumption and high integration features, has great significance to its integrated optimization design, improving the system stable and flexible.