| 新型微机继电保护硬件平台设计 |
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| 引用本文： | 何红军,郭伟,常莹.新型微机继电保护硬件平台设计[J].江苏电机工程,2006,25(5):47-49. |
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| 作者姓名： | 何红军 郭伟 常莹 |
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| 作者单位： | 东南大学电气工程系,江苏,南京,210096 |
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| 摘 要： | 根据微机保护系统的发展趋势,提出了一种基于数字信号处理器(DSP)和高级RISC微处理器(ARM)双处理器结构的数字继电保护硬件平台的设计方案,介绍了数字式继电保护硬件平台的整体结构。该方案中保护CPU采用高性能32 bit浮点DSP芯片TMS320VC33,通过现场可编程门阵列(FPGA)进行输入/输出(I/O)扩展,配合16 bit并行模拟数字转换器,完成多通道高速率采样和保护计算的任务;控制中央处理器(CPU)采用具有ARM920T核的AT91RM9200芯片,完成人机接口和各种通信功能。经过试验,证实该装置可靠。
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| 关 键 词： | 电力系统 继电保护 硬件平台 现场可编程门阵列 |
| 文章编号： | 1009-0665（2006）05-0047-03 |
| 收稿时间： | 2006-05-25 |
| 修稿时间： | 2006-05-252006-06-12 |
Design for New Micro-computer Relay Protection Hardware Platform |
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| HE Hong-jun,GUO Wei,CHANG Ying.Design for New Micro-computer Relay Protection Hardware Platform[J].Jiangsu Electrical Engineering,2006,25(5):47-49. |
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| Authors: | HE Hong-jun GUO Wei CHANG Ying |
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| Affiliation: | Southeast University, Nanjing 210096, China |
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| Abstract: | According to the development trend of microcomputer protection system,a scheme of digital relay protection hardware platform based on DSP and ARM dual-CPU configuration is put forward,and the integral hardware structure of digital relay protection platform is introduced.The CPU for protection adopts 32 bit DSP TMS320VC33,which completes the tasks of multi-channel high-speed sampling and protection calculation through I/O expansion with FPGA(field programmable gate array),coordinated with 16 bit parallel A/D.The CPU for control adopts chip AT91RM9200 with the core of ARM920T,which realizes man-machine interface and communication.The field trial operation proves its reliability. |
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| Keywords: | power system relay protection hardware platform field programmable gate array |
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