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Elimination of truncation and round off error and enhancement of stability using a new split loop DPLL |
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| Authors: | Surjadeep Sarkar Basab Chatterjee Ujjwal Maulik Baidyanath Biswas |
| Affiliation: | 1. Department of Information Technology, Jalpaiguri Government Engineering College, , Jalpaigri 735102, West Bengal, India;2. Department of Applied Electronics and Instrumentation Engineering (AEIE), Academy of Technology, , Aedconagar, Hooghly 712121, West Bengal, India;3. Department of Computer Science and Engineering (CSE), Jadavpur University, , Kolkata, West Bengal, India;4. Education Division, Sir J. C. Bose School of Engineering, SKF Group, , Mankundu 712139, West Bengal, India |
| Abstract: | In contrast with the conventional split loop digital phase lock loop, a new loop is presented in this paper that differs from the earlier version principally by design aspects. It incorporates an additional phase modulation input along with its frequency modulation input in the digital controlled oscillator. It is capable of eliminating the deleterious effects of rounding and truncation error with faster signal accusation. Higher loop stability is also achievable using the new split loop digital phase lock loop. Furthermore, radio frequency filtering is done using an In phase and Quadrature phase (IQ) voltage controlled oscillator to avoid interaction between the loop filter and the radio frequency filter. Copyright © 2011 John Wiley & Sons, Ltd. |
| Keywords: | digital controlled oscillator(DCO) digital phase lock loop (DPLL) split loop DPLL noise bandwidth DCO with phase modulation truncation round off finite word length phase margin unit circle |