| 版图电路节点提取及其压缩算法 |
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| 引用本文： | 肖军,陈后鹏,林争辉.版图电路节点提取及其压缩算法[J].微电子学,1999,29(5):327-330. |
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| 作者姓名： | 肖军 陈后鹏 林争辉 |
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| 作者单位： | 上海交通大学,大规模集成电路研究所,上海,200030 |
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| 摘 要： | 提出了一种版图电路节点提取及节点压缩算法。通过在工艺及文件中设定节点生成过程，该方法能方便地提取各种版图电路节点。
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| 关 键 词： | 版图提取 计算机辅助设计 节点提取 压缩算法 IC |
| 修稿时间： | 1998-12-08 |
An Algorithm for Node Extraction of Ci rcuit Layout and Its Compaction |
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| XIAO Jun,CHEN Hou-peng,LIN Zheng-hui.An Algorithm for Node Extraction of Ci rcuit Layout and Its Compaction[J].Microelectronics,1999,29(5):327-330. |
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| Authors: | XIAO Jun CHEN Hou-peng LIN Zheng-hui |
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| Abstract: | A general approach for node extraction of circuit layout and a node compaction method are given in this paper By defining node extraction procedure in technology file, the algorithm can extract nodes conveniently from all kinds of IC layouts |
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| Keywords: | IC CAD Layout extraction Node extraction Compaction algorithm |
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