| 雷达实时仿真中的脉冲压缩技术研究 |
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| 引用本文： | 陈勇,姚新宇,潘玉林,唐小凤. 雷达实时仿真中的脉冲压缩技术研究[J]. 电子技术应用, 2012, 1(1): 118-121. DOI: 10.3969/j.issn.0258-7998.2012.01.037 |
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| 作者姓名： | 陈勇 姚新宇 潘玉林 唐小凤 |
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| 作者单位： | 1.国防科技大学机电工程与自动化学院,湖南长沙,410073;2.徐州工程兵指挥学院,江苏徐州,221004;3.总后后勤科学研究所,北京,100071 |
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| 摘 要： | 在雷达实时仿真系统中,通过匹配滤波法,利用FPGA硬件实现了数字脉冲压缩功能模块.根据仿真系统通用性要求,定义了标准的模块接口界面;依据频域FFT法,设计了流水式并行结构,满足信号的实时输入输出与高速处理,并给出了共享FFT引擎结构,节省近一半资源.为了进一步减少理论误差,引入分段卷积思想,具体设计了重叠相加法电路.实验结果表明,多种方案完成了预期压缩功能,数据吞吐率达到每秒数十兆,处理时间仅约10 μs.
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| 关 键 词： | 雷达实时仿真 脉冲压缩 分段卷积 FPGA |
Study of pulse compression technology in real-time radar simulation |
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| Chen Yong , Yao Xinyu , Pan Yulin , Tang Xiaofeng. Study of pulse compression technology in real-time radar simulation[J]. Application of Electronic Technique, 2012, 1(1): 118-121. DOI: 10.3969/j.issn.0258-7998.2012.01.037 |
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| Authors: | Chen Yong Yao Xinyu Pan Yulin Tang Xiaofeng |
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| Affiliation: | 1.College of Mechatronics Engineering and Automation,National University of Defense Technology,Changsha 410073,China; 2.Xuzhou Engineer Corps Command College,Xuzhou 221004,China; 3.Logistics Research Institute,Beijing 100071,China) |
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| Abstract: | In real-time radar simulation system,a digital pulse compression function module was realized by FPGA,which followed matched-filter rules.According to generality requirements of simulation system,the standard module interface was defined.Using FFT method in frequency domain,pipeline and parallel structure was designed for real-time input and output.Also a structure of shared FFT engine was proposed to save about half resources.In order to decrease theoretical error,segmental convolution was introduced,and overlap-then-add circuit was designed.The results show that,all projects complete the expected function,and could process tens of Mega datum per second with nearly 10 μs delay. |
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| Keywords: | real-time radar simulation pulse compression segmental convolution FPGA |
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