| 基于DSP和FPGA的全景图像处理系统设计与实现 |
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| 引用本文： | 陆军,高乐,刘涛.基于DSP和FPGA的全景图像处理系统设计与实现[J].电子技术应用,2012,38(6):24-26,30. |
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| 作者姓名： | 陆军 高乐 刘涛 |
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| 作者单位： | 1. 哈尔滨工程大学自动化学院,黑龙江 哈尔滨,150001
2. 中国科学院沈阳自动化研究所,辽宁 沈阳,110000 |
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| 摘 要： | 设计了基于DSP和FPGA的全景图像处理方案,FPGA完成图像采集,DSP完成图像的各种处理算法。利用FPGA设计了基于乒乓缓存机制的SDRAM控制器;采用EDMA方式,完成了DSP与FPGA的数据交换。测试结果表明,DSP+FPGA折反射全景图像处理系统完成了对分辨率为2 048×2 048、每秒15帧的Camera Link接口的全景图像的实时采集及缓存解算,并以1 024×768的分辨率进行实时显示。
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| 关 键 词： | DSP FPGA SDRAM控制器 乒乓缓存 |
Design and realization of panoramic image processing system based on DSP and FPGA |
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| Lu Jun
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Gao Le
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Liu Tao.Design and realization of panoramic image processing system based on DSP and FPGA[J].Application of Electronic Technique,2012,38(6):24-26,30. |
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| Authors: | Lu Jun Gao Le Liu Tao |
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| Affiliation: | 1.College of Automation,Harbin Engineering University,Harbin 150001,China; 2.Shenyang Institute of Automation,Chinese Academy of Sciences,Shenyang 110000,China) |
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| Abstract: | A scheme of panoramic image processing based on DSP and FPGA.FPGA is designed in this paper.Image acquisition is implemented by using FPGA.DSP completes image processing algorithms.Using of FPGA,the SDRAM controller in ping-pang buffer mechanism is designed.Communication between DSP and FPGA is implemented based on EDMA mode.Experimental results show that the design of DSP and FPGA panoramic image processing system can implement real-time image acquisition,buffering of 2048×2048,15fps per second based on camera Link interface.The system can also real-time display panoramic image in 1 024×768. |
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| Keywords: | DSP FPGA SDRAM controller ping-pong cache |
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