| 1.5V高速全摆幅BiCMOS逻辑电路的研究 |
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| 引用本文： | 王海永,邵志标. 1.5V高速全摆幅BiCMOS逻辑电路的研究[J]. 微电子学, 2000, 30(3): 155-157 |
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| 作者姓名： | 王海永 邵志标 |
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| 作者单位： | 西安交通大学,电子科学与技术系,陕西,西安,710049 |
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| 摘 要： | 分析了影响ＢｉＣＭＯＳ全摆幅输出和高速度的因素，探索了一种新的抑制ＢＪＴ过饱和和反馈网络，提出了具有高速全摆幅输出的ＢｉＣＭＯＳ逻辑单元。该单元可以工作于１．５Ｖ，并且易于多输入扩展，它特别适于ＶＬＳＩ设计。模拟结果表明，该单元实现了优于ＣＭＯＳ的全摆幅输出，且其速度高于同类ＣＭＯＳ电路１０倍以上。
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| 关 键 词： | BiCMOS 逻辑电路 超大规模集成电路 |
A Study on a 1.5V High-Speed and Full-Swing BiCMOS Logic Circuit |
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| WANG Hai-yong,SHAO Zhi-biao. A Study on a 1.5V High-Speed and Full-Swing BiCMOS Logic Circuit[J]. Microelectronics, 2000, 30(3): 155-157 |
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| Authors: | WANG Hai-yong SHAO Zhi-biao |
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| Abstract: | A novel full-swing and high-speed BiCMOS buffer whose supply voltage is lowered down to 1 5 V is pro posed A new feedback network that restra ins BJT from oversaturation is explored by analyzing factors affecting the full- swing output and high-speed of the BiCMO S logic circuit This new circuit can imp lement multi-input logic circuits with ease,and is especially suitable for VLSI design The proposed circuit outperfo rms CMOS in full-swing output and its sp eed is 10 times faster than CMOS circuit |
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| Keywords: | BiCMOS Logic circuit Full swing technique VLSI |
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