宽带数字信道化接收机算法研究与硬件实现

对宽带数字信道化接收机进行了理论研究与硬件实现。该系统模型采用多相滤波结构,使用IFFT算法简化信道化多相滤波器结构与参数,并对各个信道进行下变频产生基带信号以便后续信号识别分析处理,信道化频带划分采用均匀且相邻信道50%交叠的方式。该系统硬件采用A/D转换芯片和FPGA芯片实现,A/D转换芯片完成宽带信号采集,FPGA芯片完成相关算法软件实现。该接收机结构具有设计灵活、实现简单、计算效率高、实时处理能力强、计算量低、FPGA硬件资源少等优点。

Wideband Digital Channelized Receiver's Algorithm Research and Its Hardware Implementation

The theoretical research and hardware implementation of wideband digital channelized receiver are carried out.The algorithm model of this system adopts the polyphase filters structure.The IFFT algorithm is used to simplify the structure and the parameters of channelized polyphase filters, and to make down conversion for each channel to produce baseband signal for subsequent signal recognition and analysis.The equal and adjacent channel 50% overlapping pattern is used to divide the channel band.The A/D conversion chip and FPGA chip are used to implement the hardware of this system.The A/D conversion chip is used to get the wideband signals, and the FPGA chip is used to complete the software algorithm.This receiver's structure have many advantages, such as flexible design, simple implementation, high computational efficiency, strong real-time processing capability, low computational complexity and less FPGA hardware resources.