Fault tolerance in multiprocessor systems |
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Authors: | Nripendra N Biswas S Srinivas |
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Affiliation: | (1) Department of Electrical Communication Engineering, Indian Institute of Science, 560 012 Bangalore, India |
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Abstract: | Multiprocessor systems which afford a high degree of parallelism are used in a variety of applications. The extremely stringent
reliability requirement has made the provision of fault-tolerance an important aspect in the design of such systems. This
paper presents a review of the various approaches towards tolerating hardware faults in multiprocessor systems. It emphasizes
the basic concepts of fault tolerant design and the various problems to be taken care of by the designer. An indepth survey
of the various models, techniques and methods for fault diagnosis is given. Further, we consider the strategies for fault-tolerance
in specialized multiprocessor architectures which have the ability of dynamic reconfiguration and are suited tovlsi implementation. An analysis of the state-of-the-art is given which points out the major aspects of fault-tolerance in such
architectures. |
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Keywords: | Dynamic architecture fault-tolerance fault-tolerant computer architecture multiprocessor systems reconfiguration system-level diagnosis vlsi processor arrays" target="_blank">vlsi processor arrays |
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