Device assessment of the electrical activity of threading dislocations in strained Ge epitaxial layers

It is shown that the high density of threading dislocations (TDs) and, more specifically, the high density of point defects associated with it and present in our strained Ge epitaxial layers on a Si_0.2Ge_0.8 relaxed buffer layer degrades the mobility and the leakage current of pMOSFETs and p⁺n junctions fabricated therein. Annealing in the range 550–650 °C prior to gate stack deposition improves the device performance, although there is no marked change in the TD density. From this, it is concluded that the annealing may reduce the density of point defects grown in during the epitaxial deposition.