| 一种低功耗的13位100MS／s采样保持电路 |
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| 引用本文： | 杨旭刚,李开航,周林兵.一种低功耗的13位100MS／s采样保持电路[J].现代电子技术,2010,33(4):23-25,37. |
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| 作者姓名： | 杨旭刚 李开航 周林兵 |
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| 作者单位： | 厦门大学物理与机电工程学院,福建,厦门,361005 |
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| 摘 要： | 采用TSMC0．18μm 1P6MCMOS工艺设计了一种高性能低功耗采样保持电路。该电路采用全差分折叠增益自举运算放大器和栅压自举开关实现。在3．3V电源电压下，该电路静态功耗仅为16．6mw。在100MHz采样频率时，输入信号在奈奎斯特频率下该电路能达到91dB的SFDR，其有效精度可以达到13位。
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| 关 键 词： | 流水线ADC 采样保持电路 栅压自举开关 增益自举运算放大器 |
Low Power 13 b 100 MS/s Sample and Hold Circuit |
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| YANG Xugang,LI Kaihang,ZHOU Linbing.Low Power 13 b 100 MS/s Sample and Hold Circuit[J].Modern Electronic Technique,2010,33(4):23-25,37. |
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| Authors: | YANG Xugang LI Kaihang ZHOU Linbing |
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| Affiliation: | YANG Xugang,LI Kaihang,ZHOU Linbing(College of Physics , Mechanical & Electrical Engineering,Xiamen University,Xiamen,361005,China) |
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| Abstract: | A high performance low power sample and hold circuit is designed based on TSMC0.18 μm 1P6M CMOS technology. In this circuit, a fully differential folded gain- boosted operational amplifier and bootstrapped switch is employed to meet the requirements. The circuit consumes only 16.6 mW static power with 3.3 V power supply,it can attain 91 dB SFDR when the input signal at Nyquist frequency with sampling rate of 100 MS/s,of which the effective number of bit（ENOB） can reach to 13 b. |
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| Keywords: | pipeline A/D converter sample and hold circuit bootstrapped switch gain-boosted operational amplifier |
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