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新型电容式MEMS加速度计数字接口电路设计
引用本文:李宗伟,丛宁,熊兴崟,韩可都,杨长春.新型电容式MEMS加速度计数字接口电路设计[J].电子学报,2016,44(10):2507-2513.
作者姓名:李宗伟  丛宁  熊兴崟  韩可都  杨长春
作者单位:1. 中国科学院地质与地球物理研究所,北京100029; 中国科学院大学,北京 100049;2. 中国科学院地质与地球物理研究所,北京,100029
基金项目:国家重大科研装备研制(No.ZDYZ2012-1-06-04);国家科技重大专项(2011ZX05008-005)
摘    要:MEMS加速度计接口电路主要采用传统sigma-delta架构实现,但这种方式中的电路失调电压很容易产生积分饱和现象.为解决这个问题,本文设计了一种可以用于钻井、石油勘探等微弱信号检测的新型数字电容接口电路.该设计在电容式MEMS加速度传感器基础上,采用FPGA实现数字三阶环路滤波器,构成5阶sigma-delta系统.采用数字环路滤波器降低了ASIC模拟电路版图设计与芯片测试难度,利于快速优化环路滤波器设计参数,改善系统稳定性和优化系统噪声性能.前置放大器采用一种相对简单的相关双采样技术,能够有效减小前置放大器的失调电压.根据MEMS加速度计前置放大器输出信号符合正态分布的特点,设计了带有一定预测功能的8-bit瞬时浮点ADC,实现模拟与数字环路滤波器互联.在200Hz带宽内,该接口电路系统噪声基底达到53.09ng/rt(Hz),满足系统噪声设计要求.前置放大器与ADC采用XFAB XH018混合信号CMOS工艺流片,开环测试表明,前置放大器的灵敏度和噪声分别为0.69V/pF和3.20μV/rt(Hz).

关 键 词:接口电路  MEMS  sigma-delta  ADC
收稿时间:2015-08-19

A New Type Capacitive MEMS AcceIerometer DigitaI Interface Circuit Design
LI Zong-wei,CONG Ning,XIONG Xing-yin,HAN Ke-du,YANG Chang-chun.A New Type Capacitive MEMS AcceIerometer DigitaI Interface Circuit Design[J].Acta Electronica Sinica,2016,44(10):2507-2513.
Authors:LI Zong-wei  CONG Ning  XIONG Xing-yin  HAN Ke-du  YANG Chang-chun
Abstract:The circuit offset often causes integration saturation in the traditional sigma-delta interface of capacitive MEMS accelerometers.To address this problem,a new type of capacitive digital interface circuit used for downhole explora-tion and oil detection is designed.This paper presents a MEMS-based 5 th-order sigma-delta capacitive accelerometer,where the 3 rd-order digital loop filter is realized using FPGA.This will reduce the ASIC analog circuit layout design and chip tes-ting difficulties and is easy to optimize the loop filter parameters,which can be used to improve the system stability and opti-mize the noise performance.The analog-frond-end amplifier (AFE)is realized by using a simple correlated double sampling (CDS),which is one effective method to reduce circuit offset of AFE.According to the Gaussian distribution of AFE output signal,one new type 8-bit instantaneous floating point ADC (IFP ADC)is designed.The IFP ADC is used to convert analog signal of AFE to digital signal to feed the 3 rd-order digital loop filter.The whole system provides a significantly low noise floor 53. 09ng/rt(Hz)overall a 200 Hz bandwidth.In this work,the AFE amplifier and ADC were successfully fabricated by using XFAB XH018 mixed-signal CMOS process.Furthermore,the sensitivity and noise floor of the AFE amplifier are 0. 69V/pF and 3. 20μV/rt(Hz)in open loop measurement,respectively.
Keywords:interface circuit  MEMS  sigma-delta  ADC
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