Direct-coupled high speed adder by using Josephson junction

This paper presents the latest design work of high speed adder logic based on Josephson elements. The Josephson adder uses a novel exclusive-OR logic and performs high speed carry propagation technique. The idea of directionality is also undertaken to avoid the necessary distortion in carry signal. The principle of operation with salient feature of simulation of the adder are presented in full detail. Necessary checks for carry skip and other fabrication parameters are investigated using detailed model of the device based on its highly miniaturized size. The results of the simulation show that the nominal delay of the adder logic is 20 ps/stage and average power dissipation is 47 μW/stage. Authors have mainly stressed upon how to obtain ultra fast speed at the cost of very low power dissipation of the presented adder with its small size.