| 软件无线电数字下变频技术研究及FPGA实现 |
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| 引用本文： | 何立志,邱洋,何松.软件无线电数字下变频技术研究及FPGA实现[J].电子技术应用,2010(11). |
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| 作者姓名： | 何立志 邱洋 何松 |
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| 作者单位： | 西南交通大学信息科学与技术学院; |
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| 摘 要： | 在数字下变频系统实现方案中,输入的模拟中频信号经过高速A/D采样数字化后与数控振荡器NCO(Numerically Controlled Osillator)产生的正交本振信号混频,然后再由抽取滤波模块进行处理,以输出低速的低频或基带信号。本文以软件无线电数字下变频技术为研究对象,参考GSM系统建立数字下变频系统。
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| 关 键 词： | 软件无线电 数字下变频 FPGA 抽取滤波 |
Software radio digital down converter technology and FPGA implementation |
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| HE Li Zhi,QIU Yang,HE Song.Software radio digital down converter technology and FPGA implementation[J].Application of Electronic Technique,2010(11). |
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| Authors: | HE Li Zhi QIU Yang HE Song |
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| Affiliation: | HE Li Zhi,QIU Yang,HE Song (School of Information Science and Technology,Southwest Jiaotong University,Chengdu 611756,China) |
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| Abstract: | It need to deal with the frequency mixing、filtering、decimating and shaping of the iput signals.In the DDC system, sampled and digitized IF signals has to multiply with the orthogonal local oscillator signals generated by the Numerically Controlled Oscillator(NCO),and then be processed by the decimating filter module to output lower frequency or baseband signals with low speed.This paper resarches on the DDC technology in sofware radio systems,Comparing with the parameters of the GSM system,a FPGA-based DDC system is established. |
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| Keywords: | software radio digitial down conversion FPGA decimating filter |
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