A new technique in LDMOS transistors to improve the breakdown voltage and the lattice temperature |
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Affiliation: | 1. School of Engineering, Damghan University, Damghan, Iran;2. Electrical and Computer Engineering Department, Semnan University, Semnan, Iran;1. Department of Physics, Sri Ramakrishna Mission Vidyalaya college of Arts and Science, Coimbatore 641020, Tamil Nadu, India;2. Research & Development Centre, Bharathiar University, Coimbatore 641046, Tamil Nadu, India;3. Department of Physics, Dr. Mahalingam College of Engineering and Technology, Pollachi 642003, Tamil Nadu, India;4. Department of Physics, Adhiyamaan College of Engineering, Hosur 635109, Tamil Nadu, India;1. Department of Physics, Bahauddin Zakariya University, Multan 60800, Pakistan;2. Department of Polymer Science and Engineering, Zhejiang University, Hangzhou 310037, PR China;1. Department of Physics, Faculty of Sciences, University of Atatürk, 25240 Erzurum, Turkey;2. Department of Bioengineering, Faculty of Engineering and Architecture, Kafkas University, Turkey;3. Department of Chemistry, Faculty of Sciences, University of Atatürk, 25240 Erzurum, Turkey;4. Physics Engineering Department, Faculty of Science, Istanbul Medeniyet University, Istanbul 34100, Turkey |
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Abstract: | ![]() A new technique for high breakdown voltage of the LDMOS device is proposed in this paper. The main idea in the proposed technique is to insert the P+ silicon windows in the buried oxide at the interface of the n-drift to improve the breakdown voltage, electric field and maximum lattice temperature. The proposed structure is called as P+ window LDMOS (PW-LDMOS). It is shown by extending the depletion region between the P+ windows and the n-drift region, the breakdown voltage of PW-LDMOS increases to 405 V from 84 V of the conventional LDMOS on 1 µm silicon layer and 2 µm buried oxide layer. Also, effective values of doping, length, and depth of P+ window are investigated in the breakdown voltage. Moreover, a self-heating-effect is alleviated by the silicon windows in comparison with the conventional LDMOS. All the achieved results have been extracted by two-dimensional and two-carriers simulator ATLAS. |
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Keywords: | LDMOS SOI Breakdown voltage Self-heating effects |
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