| 一种快速有限域乘法器结构及其VLSI实现 |
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| 引用本文： | 袁丹寿,戎蒙恬,陈波.一种快速有限域乘法器结构及其VLSI实现[J].微电子学,2005,35(3):314-317. |
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| 作者姓名： | 袁丹寿 戎蒙恬 陈波 |
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| 作者单位： | 上海交通大学,电子工程系,上海,200030 |
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| 基金项目： | 国家高技术研究发展计划(863计划) |
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| 摘 要： | 提出了一种快速有限域乘法器结构.将多项式被乘数与乘数各自平分成两个子多项式,并使用数字乘法结构计算这些子多项式的乘积.通过改变数字乘法结构的数字大小D,来均衡乘法器性能和实现复杂度.为了简化模不可约多项式f(x)运算,采用特殊多项式AOP(all one polynomials)和三项式,产生有限域GF(2m).这种乘法器与LSD乘法器相比,在数字大小D相同时,可将运算速度提高1倍.这种乘法器结构适合高安全度密码算法的VLSI设计.
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| 关 键 词： | 有限域 乘法器 椭圆曲线密码 |
| 文章编号： | 1004-3365(2005)03-0314-04 |
A Fast Finite Field Multiplier Architecture and Its VLSI Implementation |
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| YUAN Dan-shou,RONG Meng-tian,CHEN Bo.A Fast Finite Field Multiplier Architecture and Its VLSI Implementation[J].Microelectronics,2005,35(3):314-317. |
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| Authors: | YUAN Dan-shou RONG Meng-tian CHEN Bo |
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| Abstract: | A fast finite field multiplier is proposed in this paper. The architecture equally divides the multiplicator and multiplicand of field multiplication into two sub-polynomials, respectively, whose products are calculated by the digit multiplier. To simplify reduction modulo, special polynomials are used to generate finite field GF(2m), such as AOP (all one polynomials) and trinomials. Compared to the traditional LSD multiplier, the proposed multiplier is two times faster. In addition, this multiplier structure is suitable for VLSI design of high-security cryptographic algorithms. |
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| Keywords: | VLSI |
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