嵌入式自动变模控制的快速全数字锁相环

对如何提高嵌入式全数字锁相环的锁定速度进行了研究。应用MATLAB分析了影响锁相环快速锁定的主要因素。提出了一种具有高精度自动变模控制的快速全数字锁相环。它能够根据量化相位误差的大小，自动调节数字环路滤波器的模值，避免了环路在捕捉过程中出现连续的同向相位调整，减少了因相位超调所产生的振荡，从而提高了控制精度，进一步加快了锁定速度。经计算机仿真和硬件试验证实，该锁相环既可大大缩短捕捉时间，又能够大幅减少噪声对环路的干扰。

Embedded Fast All Digital Phase Locked Loop with Automatic Modulus Control

How to raise the phase lock speed of embedded DPLL is researched .The primary factor affecting fast phase lock is analyzed by using MATLAB. Then a fast all digital phase locked loop with a high precision automatic modulus control is proposed. It can control automatically the modulus of digital loop filter according to phase error. The DPLL has avoided adjusting phase continuously towards same direction in the process of pull-in and decreased oscillation because of the excess adjustment of phase, thus raising control precision and taking further step to quicken phase lock speed. It has proved by simulation and hardware experiment that the DPLL can decrease greatly both pull-in time and noise interference.