Different nature of process-induced and stress-induced defects in thin SiO/sub 2/ layers

High-temperature anneal in hydrogen ambient is performed at the end of a CMOS manufacturing process to recover the process-induced defects. The authors focus on the recovery and wearout of thin gate oxides (3.3 nm) during repetitive stress-anneal-stress cycles. Thermal annealing at 450 /spl deg/C leads to detrapping phenomena and to the complete recovering of electrically induced defects. On the other hand, the same thermal annealing is not capable of fully recovering the process-induced damage. The kinetic of defect recovering (and not the number of defects annealed out) strongly depends on the amount of latent damage.