ZigBee网络节点基带处理器的设计与实现

设计一款新型符合ZigBee协议的无线传感器网络节点基带处理器。提出一种O-QPSK非相干解调的同步相关解码方式，解决了解调电路的结构冗余问题，降低了数字接收机的信噪比。设计收发控制器完成发送与接收流程的管理，通过模式切换和软件平台的优化降低了整个节点芯片的工作功耗和面积。通过Altera Stratix S80 FPGA平台进行测试验证，结果符合设计要求。

Design and Implementation of Baseband-processor for ZigBee Network Node

This paper presents a new baseband-processor for Wireless Sensor Network(WSN) node based on ZigBee protocol. A dedicated demodulation architecture based on a non-coherent receiver algorithm is proposed to enhance the receive sensitivity and reduce the circuit redundancy. A new transceiver control unit is designed to manage the whole transmit and receive process. Other techniques, such as operation mode switch, power management, software platform optimization etc. are also implemented to reduce the power consumption as well as chip area. The design is implemented and verified in Altera Stratix S80 FPGA platform. Test results prove its expected functionality and its low power consumption.