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硅集成电路光刻技术的发展与挑战
引用本文:王阳元,康晋锋.硅集成电路光刻技术的发展与挑战[J].半导体学报,2002,23(3):225-237.
作者姓名:王阳元  康晋锋
作者单位:北京大学微电子所,北京,100871
摘    要:从微电子集成电路技术发展的趋势,介绍了集成电路技术发展对光刻曝光技术的需求,综述了当前主流的DUV光学曝光技术和新一代曝光技术中的157nm光学曝光、13nm EUV曝光、电子束曝光、X射线曝光、离子束曝光和纳米印制光刻技术的发展状况及所面临的技术挑战.同时,对光学曝光技术中采用的各种分辨率增强技术如偏轴照明(OAI)、光学邻近效应校正(OPC)、移相掩膜(PSM)、硅片表面的平整化、光刻胶修剪(resist trimming)、抗反射功能和表面感光后的多层光刻胶等技术的原理进行了介绍,并对不同技术时代可能采用的曝光技术作了展望性的评述.

关 键 词:光刻  集成电路  微电子
文章编号:0253-4177(2002)03-0225-13
修稿时间:2001年11月5日

Development and Challenges of Lithography for ULSI
Wang Yangyuan and Kang Jinfeng.Development and Challenges of Lithography for ULSI[J].Chinese Journal of Semiconductors,2002,23(3):225-237.
Authors:Wang Yangyuan and Kang Jinfeng
Abstract:The requirements for the lithography technology from the developing trend of ICs are described.The leading edge production lithography with deep ultraviolet (DUV) wavelength and the next generation lithography technologies such as 157nm optical lithography,13nm EUV lithography,electron beams lithography,X ray lithography,ion beams lithography,and nanoimprint lithography are reviewed.Meanwhile,the principles of the resolution enhancement technologies such as off axis illumination (OAI),optical proximity effect correction (OPC),phase shift mask (PSM),planarization of Si substrate surface with chemical mechanical polishing (CMP),resist trimming,and the resists with top surface imaged and antireflective layers are introduced.The potential lithography technologies for the future technology nodes are prospected.
Keywords:lithography  IC  microelectronics
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